| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78606
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-564
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00 |
| filingDate |
2015-09-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_94be08b26f8d4214f1b952ccdf04b9f1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eeb28b9ce64a0bca4e70ad5d796b2f27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7ab94ab226b45df4ba747bc2c5b4643a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5bc4deaf575426085ffd1a0a41408e15 |
| publicationDate |
2015-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2015380364-A1 |
| titleOfInvention |
Semiconductor device and method for manufacturing the same |
| abstract |
A metal oxide layer is in contact with an interlayer insulating layer covering a transistor, and has a stacked-layer structure including a first metal oxide layer having an amorphous structure and a second metal oxide layer having a polycrystalline structure. In the first metal oxide layer, there are no crystal grain boundaries, and grid intervals are wide as compared to those in a metal oxide layer in a crystalline state; thus, the first metal oxide layer easily traps moisture between the lattices. In the second metal oxide layer having a polycrystalline structure, crystal parts other than crystal grain boundary portions have dense structures and extremely low moisture permeability. Thus, the structure in which the metal oxide layer including the first metal oxide layer and the second metal oxide layer is in contact with the interlayer insulating layer can effectively prevent moisture permeation into the transistor. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10096868-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11348849-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11426818-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11167375-B2 |
| priorityDate |
2011-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |