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filingDate 2015-09-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a07cd232444a1d55457c3f9b93b18394
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publicationDate 2015-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2015380300-A1
titleOfInvention Self-Aligned Double Spacer Patterning Process
abstract Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including forming a first hard mask layer over a semiconductor device layer, the first hard mask layer comprising a metal-containing material, forming a second hard mask layer over the first hard mask layer, and forming a first set of metal-containing spacers over the second hard mask layer. The method further includes patterning the second hard mask layer using the first set of metal-containing spacers as a mask, forming a second set of metal-containing spacers on sidewalls of the patterned second hard mask layer, and patterning the first hard mask layer using the second set of metal-containing spacers as a mask.
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