http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015228324-A1

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-177
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-1776
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-30
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filingDate 2015-02-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_598e7504717c4325e148358d866e9309
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publicationDate 2015-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2015228324-A1
titleOfInvention Semiconductor device
abstract A low-power semiconductor device is provided. A memory device applicable to a multi-context programmable logic device (PLD) includes at least memory cells the number of which is the same as the number of contexts. Output nodes of the memory cells are electrically connected to an output node of a configuration memory through different path transistors. A circuit including a transistor and a capacitor makes a gate potential of the path transistor higher than a high-level potential. This prevents a decrease in the potential of the output node of the configuration memory due to the threshold voltage of the path transistor without an increase in power consumption.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10263119-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10686080-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9729149-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11314484-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11769840-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014312932-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9691910-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016197202-A1
priorityDate 2014-02-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 26.