http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015178208-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-62 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-1652 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0831 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-08 |
| filingDate | 2013-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0dd61350fd1de397edd3e08bbab0253d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_23cd20b0db0a2dc0b3849a8eb490b915 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5302f5f8934457c52dbc4387142ddc3e |
| publicationDate | 2015-06-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2015178208-A1 |
| titleOfInvention | Frequency determination across an interface of a data processing system |
| abstract | One or more systems, devices, methods, and/or processes described can determine a maximum cache command rate of a processor unit. For example, an interface of the processor unit configured to be coupled to an interconnect of a multiprocessor system and configured such that a first portion of the interface provides a signal to a second portion of the interface, where the first portion of the interface operates utilizing a known frequency and the second portion of the interface operates utilizing a cache frequency of the processor unit; the second portion of the interface circulates the signal; the first portion of the interface receives the signal from the second portion of the interface; the first portion of the interface determines a cache command rate based on the known frequency, the frequency of the cache, and the signal; and the interface provides information indicating the cache command rate to the interconnect. |
| priorityDate | 2013-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.