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inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_51d0e8b38b8c3e72db547058fe20d451
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publicationDate 2015-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2015109019-A1
titleOfInvention Method for evaluating semiconductor device
abstract A method for evaluating a buried channel in a semiconductor device including a semiconductor layer having a stacked-layer structure is provided. A method for evaluating a semiconductor device is provided, which includes the steps of: electrically short-circuiting a source and a drain of a transistor; applying DC voltage and AC voltage to a gate to obtain a CV characteristic that indicates a relationship between the DC voltage and a capacitance between the gate and each of the source and the drain; and determining that a semiconductor layer of the transistor includes a stacked-layer structure, when the capacitance in a region in an accumulation state in the CV characteristic is increased stepwise.
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