| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-04 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-412 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-412 |
| filingDate |
2013-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6fbf007371ba488884598391b6a98960
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f1e7e478f77c2e9eca60e7b73c489ee5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_777d0c12f46b00c25e1e5b515ce4f6e5 |
| publicationDate |
2015-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2015103585-A1 |
| titleOfInvention |
High stability static random access memory cell |
| abstract |
A Static Random Access Memory (SRAM) cell is a latch circuit formed with two inverters each formed with a PMOS transistor and an NMOS transistor. The latch circuit is coupled to a capacitor through a switch. When the switch is switched on, the stability of data stored in the SRAM cell will be enhanced. When the switch is switched off, data can be written to the SRAM cell quickly. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9202814-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I778886-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014326995-A1 |
| priorityDate |
2013-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |