| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6900162c0a64e321929e285aef793d73 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-452
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0878
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0623
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41766
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-2003
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0661 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7825
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66727 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2014-02-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35891388890ee31c271f796be6597069 |
| publicationDate |
2014-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2014291756-A1 |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
A semiconductor device includes a first n-type semiconductor layer, a p-type semiconductor layer, a second n-type semiconductor layer and a trench. The first n-type semiconductor layer includes a first interface and a second interface. The second interface forms an upper surface of a convex protruded from the first interface. The p-type semiconductor layer is stacked on the first n-type semiconductor layer and includes a first region stacked on the first interface and a second region stacked on the second interface. The first region is uniformly continuous with the second region. The second n-type semiconductor layer is stacked on the p-type semiconductor layer. The trench is depressed from the second n-type semiconductor layer through the p-type semiconductor layer into the convex of the first n-type semiconductor layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2016199390-A1 |
| priorityDate |
2013-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |