| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_32ce12f8709350afe097badddf523729
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bdf16da6e5f02f5e9d4c580d4ebcdcf7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_cc7f47e7248a52c7f04830e164cf9a3e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fc336f20bf544eac17a865bd951e0e4c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_977fc3b19c538534ab165334115ca92f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08K2201-003 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02282
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01B3-008
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76229
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08L83-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0296
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76837
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02216
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01B3-00 |
| filingDate |
2011-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b57c9dde0e77fe75747b6595f5b7b325
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f68a97527f93bb47158344ec1e4d51e6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_993e59c0e6a08113ed95b31eae13c5e0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4a31cf43cf5783a9027de26444d7dfb0 |
| publicationDate |
2013-10-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2013269992-A1 |
| titleOfInvention |
Insulating structure and production method of same |
| abstract |
An insulating structure is formed that favorably maintains gap-fill capability of a narrow width pattern in a memory cell while also preventing the formation of cracks in an insulator in a peripheral circuit, and has the memory cell and peripheral circuit within the same layer. The present invention provides an insulating structure comprising a substrate and a circuit pattern formed on the substrate, wherein the circuit pattern has a narrow width region having a narrow width pattern of a width of 30 nm or less and a wide width region having a wide width pattern of a width of greater than 100 nm in the same layer, and the same insulating composition is formed within the narrow width pattern and within the wide width pattern. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014072252-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022240380-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11606861-B2 |
| priorityDate |
2010-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |