| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e41651508566f0385833e1ba14a21ffd |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14643
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T436-25875
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01J1-46 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-4145
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C12Q1-6869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-4143
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14632
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0203
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-4148
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14609
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R29-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04N25-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N33-00 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| filingDate |
2013-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_05ac5dae6a97990634541580427bc200
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_95baf629a87fed68d5c67bd756b4742b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4914eb03a136ab1eb5f7106b8294fbae |
| publicationDate |
2013-09-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2013228829-A1 |
| titleOfInvention |
Two-transistor pixel array |
| abstract |
A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device. |
| priorityDate |
2010-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |