http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013065374-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0e433c1625fc509a087c912b440da84b http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d5b5e88118afaefb74078aaffa882579 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2486980857f933c9183f28d65aa2ebc9 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ebd3355a863fa5ef9bad82d6f842a527 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-732 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66272 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1004 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-331 |
| filingDate | 2012-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25e7ac1aff4d777bea76e8c53c3b9af4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1cc1cd52159af830a4ac257779e1b9df http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_853bc706780dd8d103ca81403abdc58b |
| publicationDate | 2013-03-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2013065374-A1 |
| titleOfInvention | Fluorine Implant Under Isolation Dielectric Structures to Improve Bipolar Transistor Performance and Matching |
| abstract | A method of fabricating an integrated circuit including bipolar transistors that reduces the effects of transistor performance degradation and transistor mismatch caused by charging during plasma etch, and the integrated circuit so formed. A fluorine implant is performed at those locations at which isolation dielectric structures between base and emitter are to be formed, prior to formation of the isolation dielectric. The isolation dielectric structures may be formed by either shallow trench isolation, in which the fluorine implant is performed after trench etch, or LOCOS oxidation, in which the fluorine implant is performed prior to thermal oxidation. The fluorine implant may be normal to the device surface or at an angle from the normal. Completion of the integrated circuit is then carried out, including the use of relatively thick copper metallization requiring plasma etch. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10651094-B2 |
| priorityDate | 2011-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.