| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_93c074ed918c5386cc009642871c6fa8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f47985b7c371b565f319708450999686 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2200-375 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-45973
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-45982
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-45986 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03F3-45 |
| filingDate |
2011-07-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c29f6414ad8ba52e8d5c874a6ad4eaaa |
| publicationDate |
2012-09-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2012242404-A1 |
| titleOfInvention |
ADC Preamplifier and the Multistage Auto-Zero Technique |
| abstract |
Embodiments of the present invention provide a sample and hold amplifier that provides a preamplifier with a multi-stage zeroing architecture. The multi-stage architecture reduces effects of parasitic capacitance exponentially over prior attempts, which yields increased accuracy. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2016085544-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10502622-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018003559-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104460803-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9973200-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103904884-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9590592-B2 |
| priorityDate |
2011-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |