http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2012021588-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_68e17074c8528bcb26ef3a3cfdf41a5a http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_02a741bcc76d2c6156369e5592109597 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7ff65dd40a428d56e96690ddf24f4d46 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76254 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265 |
| filingDate | 2011-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb650b9f36117769660d0d8990ee711e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0bbaff2192784fa618d9c0c4c898317 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc8e0751938f4b8cb9daae2ddb45ac64 |
| publicationDate | 2012-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2012021588-A1 |
| titleOfInvention | Method for manufacturing soi substrate and semiconductor device |
| abstract | One object is to provide excellent electric characteristics of an end portion of a single crystal semiconductor layer having a tapered shape. An embrittled region is formed in a single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with accelerated ions. Then, the single crystal semiconductor substrate and a base substrate are bonded to each other with an insulating film interposed therebetween and a first single crystal semiconductor layer is formed over the base substrate with the insulating film interposed therebetween by separating the single crystal semiconductor substrate at the embrittled region. After that, a second single crystal semiconductor layer having a tapered end portion is formed by performing dry etching on the first single crystal semiconductor layer, and etching is performed on the end portion of the second single crystal semiconductor layer in a state where a potential on the base substrate side is a ground potential. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11087979-B2 |
| priorityDate | 2010-07-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 54.