| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b3310ea86f3c492f6c09d7be6592866d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_10625ff2d590777eaa60a20f6dcc1882
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_74c62b1e270e72bc3e86936947c7b147
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3a132b7575884ef714ef18ebb400aabf |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0568
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0394
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-09545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T29-49156
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-09481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-1152
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4069 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-46
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-1258
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4602 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 |
| filingDate |
2011-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c2f89d36f79fb64d36c28daba58ea5be
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6e57502c4b11c0b59bffa24466c29421
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_985ad23833e4e6997b38650975ca04a8 |
| publicationDate |
2012-01-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2012005894-A1 |
| titleOfInvention |
Method of manufacturing multilayered printed circuit board |
| abstract |
A method of manufacturing a multilayered circuit board, including: providing a double-sided copper clad laminate including via holes formed therethrough and openings for forming circuit patterns, formed by patterning copper foil formed on one side thereof; filling the via holes and the openings with conductive paste; removing the copper foil from the double-sided copper clad laminate to form a first circuit layer including circuit patterns on one side thereof and to form a second circuit layer including connecting pads for attaching solder balls thereto on the other side thereof; forming a build-up layer on the first circuit layer, the build-up layer including a plurality of insulating layers and a plurality of circuit layers; and forming a solder resist layer on an outermost layer of the build-up layer. |
| priorityDate |
2008-03-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |