| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76883
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 |
| filingDate |
2009-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e7a6d6806784e2f36ef855d2dd76039
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3495e6ca6d993da0346b85d32333b736
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b5fbf8d4ba9d768def398c1bbd4e8ade |
| publicationDate |
2011-06-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2011127673-A1 |
| titleOfInvention |
Wiring structure and method |
| abstract |
Disclosed is an improved integrated circuit wiring structure configured to prevent migration of wiring metal ions (e.g., copper (Cu+) ions in the case of a copper interconnect scheme) onto the surface of an interlayer dielectric material at an interface between the interlayer dielectric material and an insulating cap layer. Specifically, the top surfaces of wires and the top surface of a dielectric layer within which the wires sit are not co-planar. Thus, the interfaces between the wires and an insulating cap layer and between the dielectric layer and the same insulating cap layer are also not co-planar. Such a configuration physically prevents migration of wiring metal ions from the top surface of the wires onto the top surface of the dielectric layer at the interface between the dielectric layer and cap layer and, thereby prevents time dependent dielectric breakdown (TDDB) and eventual device failure. Also disclosed herein are embodiments of a method of a forming such an integrated circuit wiring structure. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10796995-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10483159-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114342569-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019189505-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110112095-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11380619-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11227798-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019164896-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018308749-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8841770-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013075908-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8648465-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10784155-B2 |
| priorityDate |
2009-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |