http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011097865-A1
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4bd30def211f19a50b1b96c3af949837 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
filingDate | 2011-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c7f708bb04841dea4c582e245b25fc02 |
publicationDate | 2011-04-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | US-2011097865-A1 |
titleOfInvention | High voltage-resistant semiconductor device and method of manufacturing high voltage-resistant semiconductor device |
abstract | High voltage-resistant semiconductor devices adapted to control threshold voltage by utilizing threshold voltage variation caused by plasma damage resulting from the formation of multilayer wiring, and a manufacturing method thereof. Exemplary high voltage-resistant semiconductor devices include a plurality of MOS transistors having gate insulating films not less than about 350 Å in thickness on a silicon substrate, and the MOS transistors have different area ratios between gate electrode-gate insulating film contact areas and total opening areas of contacts formed on the gate electrodes. |
priorityDate | 2008-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.