http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011090747-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_209553962cfc04543cf9de5730e0408c |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-145 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-10 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10 |
| filingDate | 2010-10-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2b0369f4a20f033f932d87134c5753dc |
| publicationDate | 2011-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2011090747-A1 |
| titleOfInvention | Integrated circuit comprising a non-dedicated terminal for receiving an erase program high voltage |
| abstract | The disclosure relates to an integrated circuit electrically powered by a supply voltage and comprising a memory electrically erasable and/or programmable by means of a second voltage greater than the supply voltage. The integrated circuit comprises means for receiving the second voltage by the intermediary of a reception terminal of the supply voltage or by the intermediary of a reception or emission terminal of a data or clock signal. Applicable in particular to electronic tags comprising a reduced number of interconnection terminals. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9875797-B1 |
| priorityDate | 2009-10-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.