| abstract |
An object is to realize low power consumption while manufacturing a semiconductor device including a thin film transistor whose parasitic capacitance is reduced. Part of an insulating layer covering the periphery of a gate electrode layer is formed to be thick. Specifically, a stack including a spacer insulating layer and a gate insulating layer is formed. The thick part of the insulating layer covering the periphery of the gate electrode layer reduces parasitic capacitance formed between the gate electrode layer of the thin film transistor and another electrode layer (another wiring layer) overlapping with the gate electrode layer. |