| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_faf522b8b83eded745c73018576219ba
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_24aca9ded2638ea793d05360dde7a4a0 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7786 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02546
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-737
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02516
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66318
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0245
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8258
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02433
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02639
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02381 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-73 |
| filingDate |
2008-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb786cda7431e0637cfba4cd2f29e523
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_22081050984018b5ca5e1ab393ef2a69
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_823429806408e829a54262a4af626a67
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_613c2db6bc0a9f99c4ae685fb745827f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_609a394000fe1b718511f9ff5b60c80c |
| publicationDate |
2011-01-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2011012175-A1 |
| titleOfInvention |
Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device |
| abstract |
A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; a Ge layer that is crystal-grown on the wafer and shaped as an isolated island; and a functional layer that is crystal-grown on the Ge layer. The Ge layer may be shaped as an island having a size that docs not exceed double a distance moved by crystal defects as a result of annealing the Ge layer at a certain temperature for a certain time. The Ge layer may be shaped as an island having a size for which stress due to a difference relative to a thermal expansion coefficient of Si, which is material of the wafer, does not cause crystal dejects when the Ge layer is annealed at a certain temperature. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015207330-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011180849-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8823141-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8890213-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8709904-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8633496-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011227042-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105355563-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011227199-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8901605-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8835906-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8835980-B2 |
| priorityDate |
2007-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |