| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ec2cf2772a722c89d7cdeaf3f7f441cc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ca180423b9e9956192260ab3f60649a1 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42376
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-0261
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2815
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66712
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28044
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-268 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2010-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1e204cdf7772130705aa8a1d4c057218
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fc225853f84200a927d3ee5787903c86
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c50055a8717ebb4533f2c99a919e1e89
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f4b7bdcf1ed6f653f5eb407fc2354f5c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc763a7c88bdf6c88e9ddba151536a63
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_51bebbbb241ee9fbbd39c0ab853bf6fb |
| publicationDate |
2010-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2010237391-A1 |
| titleOfInvention |
Process for manufacturing a large-scale integration mos device and corresponding mos device |
| abstract |
A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10488560-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019250309-A1 |
| priorityDate |
2005-11-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |