http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010033218-A1

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0814
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-06
filingDate 2008-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_34897d5b7ffb2fe1bb3396c78f50780c
publicationDate 2010-02-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2010033218-A1
titleOfInvention Semiconductor integrated circuit and method of controlling the same
abstract A semiconductor integrated circuit includes a DLL controlling block configured to enable or disable an update enable signal by detecting a change in a voltage level of a phase detecting signal during a predetermined time when an operation enable signal and a threshold phase difference detecting signal are enabled, and a delay locked loop (DLL) circuit configured to generate an output clock signal by delaying and driving the reference clock signal and to control a frequency of a change in the delay amount of the reference clock signal in response to the update enable signal.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8063681-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9503105-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2014115657-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011298510-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8482327-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011043263-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7830188-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110491429-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016112055-A1
priorityDate 2008-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 27.