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inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_09e71db1a8f4f41ed0b604ffd40cbf76
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publicationDate 2009-11-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2009278207-A1
titleOfInvention Electromigration-Complaint High Performance FET Layout
abstract An electrical contact structure distributes current along a length thereof. The electrical contact structure includes a plurality of n metal rectangles on n levels of metal. The rectangle on one metal level is at least as wide in width and vertically covers in width the rectangle on the metal level immediately below. The rectangle on one metal level is shorter in length than and substantially aligned at a first end with the rectangle on the metal level immediately below. Rectangle first ends are substantially aligned. Features of an exemplary FET transistor of this invention are a source and drain terminal electrical contact structure, a multi-level metal ring connecting gate rectangles on both ends, and a wider-than-minimum gate-to-gate spacing. The invention is useful, for example, in an electromigration-compliant, high performance transistor.
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