| abstract |
A layered structure can include laminated first and second substructures and an array with cell regions. The first substructure can include layered active circuitry, the second a top electrode layer. One or both substructure's surface that contacts the other can be on a polymer-containing layer, structured to generate free charge carriers and/or to transport charge carriers. A cell region of the array can include portions of each substructure; the cell region's portion of the first substructure can include a subregion of electrically conductive material and a subregion of semiconductive material, its portion of the second can include part of the top electrode layer. The layered structure can include one or more lamination artifacts on or in the polymer-containing layer; the lamination artifacts can include artifacts of contact pressure, or heat, or of surface shape, and the interface surface can be without vias. |