http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008168456-A1

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6e8d683f3b8bf48083cf5c569e21c28f
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-46
filingDate 2008-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c9d331917aebbeed5dc114737b8e2271
publicationDate 2008-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2008168456-A1
titleOfInvention Method of analyzing non-preemptive dram transactions in real-time unified memory architectures
abstract Systems and methods are disclosed for non-preemptive DRAM transactions. More specifically, the present invention relates to improvements in non-preemptive DRAM transactions in real-time unified memory architectures. One embodiment of the present invention relates to a method for determining access to non-preemptive DRAM devices. This method comprises determining real time need for access to the device and prioritizing access using a rate monotonic scheduling.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9032104-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014019664-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2012173786-A1
priorityDate 2002-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 20.