| abstract |
A method of fabricating a plug for a hole in a dielectric layer is disclosed. The method includes a first deposition process to partially filling the hole with a conductive material. Later, an etching process is performed at the partially filled hole. In addition, a second deposition process is performed to partially fill the hole with the conductive material again. Finally, the above steps are repeated until the hole is completely filled. The first deposition process and the second deposition process are done using a CVD or a PVD process. In addition, the etching process is done using halogen-containing gas. |