http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007040712-A1

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filingDate 2006-08-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6a867a5fdcad54f5022e5b323a0d9b4
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publicationDate 2007-02-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2007040712-A1
titleOfInvention Reconfigurable mixed-signal vlsi implementation of distributed arithmetic
abstract Disclosed herein is a reconfigurable mixed signal distributed arithmetic system including: an array of tunable voltage references operable for receiving a delayed digital input signal; a combination device in electrical communication with the array of tunable floating-gate voltage references that selectively combines an output of the array of tunable voltage references into an analog output signal; and a feedback element in electrical communication with the combination device, wherein the array of tunable voltages and the delayed digital input signal combine to perform a distributed arithmetic function and the reconfigurable mixed signal distributed arithmetic system responsively generates the analog output signal.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007106720-A1
priorityDate 2005-08-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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