| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f98358de6bbc9401c527a9aef8dd0229 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1045
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2005-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5bf9260a533955def679ea6a96bd84ce |
| publicationDate |
2006-07-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2006166422-A1 |
| titleOfInvention |
Sige nickel barrier structure employed in a cmos device to prevent excess diffusion of nickel used in the silicide material |
| abstract |
A CMOS device such as an NFET or a PFET and a method of forming a CMOS device are provided. The method begins by forming at least one patterned gate region atop a first semiconductor layer that includes silicon. Dielectric spacers are formed about exposed portions of the patterned gate region. Source-drain regions are formed in the first semiconductor layer. Recesses are formed in the first semiconductor layer that extends under the dielectric spacers. The first semiconductor layer has exposed surfaces that in part define sidewalls of the recesses. A nickel barrier layer is formed on each of the exposed surfaces of the first semiconductor layer. The nickel barrier layers are etched so that the nickel barriers remain only on portions of the exposed surfaces located under the dielectric spacers and not on remaining portions of the exposed surface. A silicon-containing layer is formed on the remaining exposed surfaces of the first semiconductor layer. Silicide layers are formed on the silicon-containing layers, wherein the silicide layer includes nickel. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9595477-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2012187459-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013122676-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007184600-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8574995-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10164093-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8182368-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-102479801-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2012068797-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009278170-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8552504-B2 |
| priorityDate |
2005-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |