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filingDate 2004-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb3a663e735d11965573ca1d9560aa8c
publicationDate 2005-09-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2005189577-A1
titleOfInvention Metal-insulator-metal (MIM) capacitor structure formed with dual damascene structure
abstract A microelectronic product and a method for fabricating the same each provide a capacitor formed interposed between a first dielectric layer and a second dielectric layer formed over a substrate having a first contact region and a second contact region exposed therein. The capacitor is also connected to a first conductor stud that penetrate4s the first dielectric layer and contacts the first contact region and a second conductor stud that penetrates the second dielectric layer. A contiguous conductor interconnect and conductor stud layer is formed within a dual damascene aperture through the second dielectric layer and the first dielectric layer and contacting the second contact region. An etch stop layer employed when forming a trench within the dual damascene aperture also passivates a capacitor sidewall.
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Total number of triples: 40.