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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00
filingDate 2004-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90dcd7d865fa0dc0d3817a2825007cf8
publicationDate 2005-08-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2005172085-A1
titleOfInvention Intelligent memory device
abstract Coordination between multiple processors presents a set of difficult problems, since most processors are not designed for multi-processing, but for multi-tasking. Additionally, CPUs are increasingly limited by the memory bandwidth bottleneck. The iMEM architecture addresses the multi-processing problem, by simplifying processor access, and the memory bandwidth problem, by distributing intelligence across the memory system. ASCII encoding of task structure and instructions addresses compiler complexities.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007043762-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7185309-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7770179-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8327099-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7823162-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7574680-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008209125-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9702305-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008077718-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7840732-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7552042-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014316684-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8065130-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7228520-B1
priorityDate 2004-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 30.