http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004189504-A1

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filingDate 2003-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_945364f6cab25a8c50c7fb1059c15d1b
publicationDate 2004-09-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2004189504-A1
titleOfInvention Semi-flash A/D converter with minimal comparator count
abstract This circuit and method provides an analog-to-digital A/D converter with minimal power and minimal integrated circuit area. A circuit and a method for A/D conversion are provided which maintains performance, but which uses fewer comparators than the prior art. This is achieved by a semi-flash analog-to-digital, A/D, converter circuit with minimal comparator count. The design does not use any subtraction or multiplication operation. It utilizes fewer comparators than the prior art semi-flash A/D converters. The prior art designs use 30 comparators for an 8-bit semi-flash A/D converter while this invention uses 8 comparators. This circuit and method does not require any external Sample and Hold, S/H circuits. It is a hybrid between flash A/Ds and successive approximation A/Ds.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008218393-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008068245-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10073034-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9425816-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007252742-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7479914-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013119276-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7429945-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103105383-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7605738-B2
priorityDate 2003-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 30.