Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_203d2357418e846eb9d27bca66014f81 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5671 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0475 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-56 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 |
filingDate |
2003-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bedbaf9658bb1ebf2317ec0b5b53aba2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cccb8fa006df2d2d316e09ab40db46ac http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0b6a305b2d23dd53a97f024305633cfd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6c0d8b38c4388d5ea5488727b8d4f18f |
publicationDate |
2004-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2004092066-A1 |
titleOfInvention |
Twin NAND device structure, array operations and fabrication method |
abstract |
A method for making a twin MONOS memory array is described where two nitride storage sites lay under the memory cell word gate. The fabrication techniques incorporate self alignment techniques to produce a small cell in which N+ diffusion the nitride storage sites are defined by sidewalls. The memory cell is used in an NAND array where the memory operations are controlled by voltages on the word lines and column selectors. Each storage site within the memory cell is separately programmed and read by application of voltages to the selected cell through the selected word line whereas the unselected word lines are used to pass drain and source voltages to the selected cell from upper and lower column voltages. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I421687-B |
priorityDate |
2001-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |