| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6cd1ed0b083ca10ea681eb17e435f6be |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2831
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-0408 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2884
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49816 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-04 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-498
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R1-073
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
| filingDate |
2003-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_23f721c4cdef74d7bcbe1a1ad3878df7 |
| publicationDate |
2003-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2003183931-A1 |
| titleOfInvention |
Semiconductor apparatus, fixture for measuring characteristics therefor, and semiconductor device characteristics measuring apparatus |
| abstract |
A surface of a silicon wafer having bump electrodes is divided in a matrix manner by scribe lines ( 2 and 3 ). The divided areas are silicon chips ( 4 ). A plurality of bumps 5 are formed on predetermined positions on the silicon chips ( 4 ). The bumps ( 5 ) are electrically conductive wear-resistant members so as to withstand repeated use. By doing this, it is possible to provide a semiconductor device which can realize a mounting operation for a semiconductor substrate of small size with high density at low cost and to measure electrical characteristics for semiconductor wafers and semiconductor chips efficiently in a manufacturing process or after a mounting operation. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022190182-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008206907-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009224241-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008074130-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1791180-A4
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1791180-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9585197-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7683492-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7439751-B2 |
| priorityDate |
2002-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |