http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2003034503-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9fc0a00eab3a757e8324b1e887d7ba97 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02488 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02505 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02521 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02381 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0605 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8258 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8258 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-38 |
| filingDate | 2001-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3a249116f85744657f14b776474edc7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2c069ce106a65582ca199033c69141fa http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_878f7d9e8b2a835a7d5766f6f26bc461 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ec6b8bb866df171b921a7a5e7c40d34d |
| publicationDate | 2003-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2003034503-A1 |
| titleOfInvention | Structure and method for fabricating semiconductor structures having instruction decoders and dispatchers formed of monocrystaline compound semiconductor material |
| abstract | High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. These materials and techniques can be advantageously utilized to fabricate a processing device having instruction decoders and instruction dispatchers. |
| priorityDate | 2001-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 77.