http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2002168812-A1

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filingDate 2001-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_737093e688a170485114afcff3e0c49b
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publicationDate 2002-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2002168812-A1
titleOfInvention Semiconductor device with multilayer wiring structure of laminated damascene wiring and fabrication method thereof
abstract A silicon oxide film, a silicon oxynitride film, and a silicon oxide film are formed on a semiconductor substrate. A silicon nitride film and a silicon oxide film are formed, and, using an overlying resist film as a mask, are subjected to dry etching to form via-holes. Oxygen plasma ashing and resist removal are carried out. The silicon nitride film is subjected to dry etching to expose the surface of the copper film and the resist residue is removed. A tungsten film is then formed to bury the via-holes with tungsten. Excess tungsten film is removed by CMP and rinsing, thereby forming via-plugs that are composed of the tungsten film that remains in the via-holes. Silicon oxide film is formed over this structure. Using a resist film as a mask, wiring trenches are formed in the silicon oxide film. The resist film and etching residue are then removed. Amine removing solution that has entered seams in the tungsten film is vaporized by a heat treatment. A copper film is embedded in the wiring trenches by a damascene method, thereby forming damascene copper wiring.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6927082-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014264319-A1
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10079245-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8993398-B1
priorityDate 2000-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 35.