| abstract |
An integrated circuit device having a plurality of input terminals comprises: a plurality of input buffers provided in correspondence to the plurality of input terminals; a pluralityof serialparallelconversioncircuitsforconverting, inserial-parallel, outputs of the inputbuffers, respectively; and a plurality of boundary scan registers which are provided in correspondence to each input terminal. The output of the input buffer is supplied to the serial parallel conversion circuit and the boundary scan register in parallel, to restrict a delay element between the input buffer and the serial parallel conversion circuit at a minimum. |