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filingDate 2002-02-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0340a5426011917f0d09c7096cd60bc4
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publicationDate 2002-08-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2002114195-A1
titleOfInvention Integrated circuit devices having delay circuits for controlling setup/delay times of data signals that are provided to memory devices and methods of operating same
abstract An integrated circuit device includes a delay circuit that is configured to delay a clock signal and is further configured to generate an output data signal in response to the delayed clock signal and an input data signal. Multiple devices are configured to respectively receive the output data signal in response to the clock signal.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004232958-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008215805-A1
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Total number of triples: 33.