| abstract |
A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface and forming a barrier layer over at least a portion of the surface. The barrier layer is formed of a platinum(x):ruthenium(1-x) alloy, where x is in the range of about 0.60 to about 0.995; preferably, x is in the range of about 0.90 to about 0.98. The barrier layer may be formed by chemical vapor deposition and the portion of the surface upon which the barrier layer is formed may be a silicon containing surface. The method is used in formation of capacitors, storage cells, contact liners, etc. |