| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0924
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
| filingDate |
2017-12-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2023-01-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5c0caf172637daa6189786acacb13fbb
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2dfc96aa81e53aa1ce7de2276090549c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3b318ad0ed3e64045ab14fad49aec168
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d758b195b4feaba683c252d6ee6c4046
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_67fa3d7ac4541b1d51ad6f612f66e2cf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_510bed3755984b20f0eb57be81dde6b4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e980122b0937ebb79125f5638c94801
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5e2175c9219bbc793c8dde3f525f64c3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4fc0025682c8adb27c90d36fb33f1e1a |
| publicationDate |
2023-01-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11557658-B2 |
| titleOfInvention |
Transistors with high density channel semiconductor over dielectric material |
| abstract |
Transistors having a plurality of channel semiconductor structures, such as fins, over a dielectric material. A source and drain are coupled to opposite ends of the structures and a gate stack intersects the plurality of structures between the source and drain. Lateral epitaxial overgrowth (LEO) may be employed to form a super-lattice of a desired periodicity from a sidewall of a fin template structure that is within a trench and extends from the dielectric material. Following LEO, the super-lattice structure may be planarized with surrounding dielectric material to expose a top of the super-lattice layers. Alternating ones of the super-lattice layers may then be selectively etched away, with the retained layers of the super-lattice then laterally separated from each other by a distance that is a function of the super-lattice periodicity. A gate dielectric and a gate electrode may be formed over the retained super-lattice layers for a channel of a transistor. |
| priorityDate |
2017-12-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |