http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11532612-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76838 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76832 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82285 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate | 2020-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2022-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_48c207b888b197699da9e2c5ee049547 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bfa96342aadc9be48c44d8cc1936cb62 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_543d1538a8ce3bf1ed24b0d187bc27b1 |
| publicationDate | 2022-12-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-11532612-B2 |
| titleOfInvention | Inter-level connection for multi-layer structures |
| abstract | Systems and methods are provided for fabricating a semiconductor device structure. An example semiconductor device structure includes a first device layer, a second device layer and an inter-level connection structure. The first device layer includes a first conductive layer and a first dielectric layer formed on the first conductive layer, the first device layer being formed on a substrate. The second device layer includes a second conductive layer, the second device layer being formed on the first device layer. The inter-level connection structure includes one or more conductive materials and configured to electrically connect to the first conductive layer and the second conductive layer, the inter-level connection structure penetrating at least part of the first dielectric layer. The first conductive layer is configured to electrically connect to a first electrode structure of a first semiconductor device within the first device layer. |
| priorityDate | 2013-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 41.