| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c943ee5f76f0b8cdffeb12667b59f37e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1464
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14627
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14625
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14621
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-16235 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14698
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3107
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14687
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5386
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14618
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5384
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14632 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
| filingDate |
2019-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2022-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_286d9f41ed30a8b5066d2f541d095d26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1046eb253ffecea2f1eaa05e6168bb58
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_efa0f86acd37cd2f70b2aed83c4e343a |
| publicationDate |
2022-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11450697-B2 |
| titleOfInvention |
Chip package with substrate having first opening surrounded by second opening and method for forming the same |
| abstract |
A chip package including a substrate, a first conductive structure, and an electrical isolation structure is provided. The substrate has a first surface and a second surface opposite the first surface), and includes a first opening and a second opening surrounding the first opening. The substrate includes a sensor device adjacent to the first surface. A first conductive structure includes a first conductive portion in the first opening of the substrate, and a second conductive portion over the second surface of the substrate. An electrical isolation structure includes a first isolation portion in the second opening of the substrate, and a second isolation portion extending from the first isolation portion and between the second surface of the substrate and the second conductive portion. The first isolation portion surrounds the first conductive portion. |
| priorityDate |
2018-09-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |