| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f187eb8cb31e70d4acd428dd8beedd4f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J7-00034
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J1-082 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J7-0029
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-3296
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J1-082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02J1-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-3287 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02J1-08 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-3287
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02J7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02J1-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-3296 |
| filingDate |
2020-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_067f2d62e61c5a05edd297e1129017a5 |
| publicationDate |
2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11360532-B2 |
| titleOfInvention |
Power supply apparatus and power receiving apparatus |
| abstract |
A power supply apparatus supports USB-PD (Universal Serial Bus-Power Delivery) specification. A bus voltage VBUS is transmitted via a bus line. A first power supply circuit generates a first bus voltage having a first voltage level. A second power supply circuit generates a second bus voltage having a second voltage level that is higher than the first voltage level. A first switch is arranged between the bus line and an output terminal of the first power supply circuit. A second switch is arranged between the bus line and an output terminal of the second power supply circuit. A control circuit receives a control signal S1 via the bus line from a power receiving apparatus, which is a power supply target. The control circuit is structured to control the first switch and the second switch based on the control signal S1. |
| priorityDate |
2015-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |