Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0e433c1625fc509a087c912b440da84b |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02057 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31138 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02326 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02337 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02332 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-51 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51 |
filingDate |
2020-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_731ab2bccca19a2db0ea397dfe842acb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ceedc48c6f9931ec3494266d24f40cc7 |
publicationDate |
2022-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11348782-B2 |
titleOfInvention |
Dual gate dielectric layers grown with an inhibitor layer |
abstract |
A semiconductor device including a first dielectric layer and a second dielectric layer is formed by forming an inhibitor layer over a semiconductor material. The inhibitor layer includes at least silicon and nitrogen. The semiconductor material is heated in an oxygen-containing ambient which oxidizes the inhibitor layer and forms the first dielectric layer which includes the oxidized inhibitor layer, and oxidizes the semiconductor material to form the second dielectric layer. The second dielectric layer is thicker than, the first dielectric layer. The first dielectric layer and the second dielectric layer each include at least 90 weight percent silicon dioxide and less than 1 weight percent nitrogen. The first dielectric layer and the second dielectric layer may be used to form gate dielectric layers for a first MOS transistor and a second MOS transistor that operates at a higher voltage than the first MOS transistor. |
priorityDate |
2020-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |