Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-845 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1211 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7853 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41791 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-16 |
filingDate |
2018-02-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4fc0025682c8adb27c90d36fb33f1e1a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e5f9b44cc5ab0dc7424bc23ae2e8a3c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0818a3fe7837f2e02467ebdc9ccfdf22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b99f3a6611fd0ebbf26735c88b57a3f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eda852a725164dc9b71794b1c8825182 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2eb2fc93416ca74a6eb4b101624b6312 |
publicationDate |
2022-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11302790-B2 |
titleOfInvention |
Fin shaping using templates and integrated circuit structures resulting therefrom |
abstract |
Fin shaping using templates, and integrated circuit structures resulting therefrom, are described. For example, integrated circuit structure includes a semiconductor fin having a protruding fin portion above an isolation structure above a substrate. The protruding fin portion has a vertical portion and one or more lateral recess pairs in the vertical portion. A gate stack is over and conformal with the protruding fin portion of the semiconductor fin. A first source or drain region is at a first side of the gate stack. A second source or drain region is at a second side of the gate stack opposite the first side of the gate stack. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022199792-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11749733-B2 |
priorityDate |
2018-02-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |