Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_12d24c0a12c3ecdb6d9a47d623d96e76 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_60e66be87630d7cef0ce770e1d898eec |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7395 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7802 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0661 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0638 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02378 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0634 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-78 |
filingDate |
2019-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e377eba06a1f877806ccfcece559eb32 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3d72db19dcce82bd08660cd781ed6d13 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0bff385bc8c6ff61e533c23e50dfafad http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a7e90e0e3327db47c954679029484324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49dfbf94f64eade2259e705ed149df2d |
publicationDate |
2022-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11282919-B2 |
titleOfInvention |
Semiconductor device |
abstract |
A semiconductor device that includes a SiC semiconductor substrate; a SiC epitaxial layer having an impurity concentration lower than that of the SiC semiconductor substrate; a first semiconductor layer including first semiconductor pillars and second semiconductor pillars; a second semiconductor layer; a device active region; a termination region; a channel stopper region having an impurity concentration higher than that of the SiC epitaxial layer; and a plurality of first chip end portions and a plurality of second chip end portions, and a surface of the first side surface is covered with an impurity region having an impurity concentration higher than those of the first semiconductor pillar and the SiC epitaxial layer and is connected to the channel stopper region. |
priorityDate |
2018-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |