http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11119848-B2

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filingDate 2019-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2021-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2508c8d9188ac92c8bf96ff4cbb79d6b
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publicationDate 2021-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-11119848-B2
titleOfInvention Logic based read sample offset in a memory sub system
abstract The present disclosure is directed to logic based read sample offset operations in a memory sub-system. A processing device performs a first read, a second read, and a third read of data from a memory devices using a first center value corresponding to a first read level threshold, a negative offset value, and a positive offset value, respectively. The processing device performs a XOR operation on results from the first and second reads to obtain a first value and a XOR operation on results from the second and third reads to obtain a second value. The processing device performs a first count operation on the first value to determine a first difference bit count and a second count operation on the second value to determine a second difference bit count. The processing device can store or output the first difference bit count and the second difference bit count.
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