| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76837
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11556
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11582
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-50 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11556
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11582
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2019-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2021-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e5ec446f36bd83c69c48d0f518aee692
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_36640c68e379dcf5af42d591fddd01e0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_38605b28bbf077f0866f4f9ad6c8ff81
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2b78c2ddd90a8e1f1c1df0c937c445c1 |
| publicationDate |
2021-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11043412-B2 |
| titleOfInvention |
Methods of forming microelectronic devices, and related microelectronic devices and electronic systems |
| abstract |
A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and additional insulating structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the additional insulating structures. A first trench is formed to partially vertically extend through the stack structure. The first trench comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the first trench. The dielectric structure comprises a substantially void-free section proximate the horizontal boundary of the first portion of the trench. Microelectronic devices and electronic systems are also described. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11696445-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022181352-A1 |
| priorityDate |
2019-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |