| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_37f4922dfb7777b019e504b885211b8e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02258
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02282
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30612 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-467
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3086
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3081
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30604 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-308
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306 |
| filingDate |
2018-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2021-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4deca00d30bfabe4a154d70530dfa0e7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f75164e055588fbb7044e24e9f41bd1b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bed8fc95bac5fdb2f0516655f04f62e2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_831190beb652aa56624dfe40f7ddd6ae
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6b9d485b1e79d50f0b0bc8645e974a9d |
| publicationDate |
2021-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11043390-B2 |
| titleOfInvention |
Mask for protecting a semiconductor material for localized etching applications |
| abstract |
The invention relates to the chemical etching of a semiconductor material, including:deposition at least one mask (PLP) on a first surface zone of a semiconductor material (SC); andchemically etching (S31) a second surface zone of the semiconductor material (SC) that is not covered by the mask (PLP).In particular, the aforementioned mask is produced in a material including polyphosphazene, which material protects the underlying semiconductor especially well. |
| priorityDate |
2017-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |