Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0483 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3472 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-5628 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3459 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3445 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3468 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-025 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3481 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-56 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-26 |
filingDate |
2020-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2021-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_684e7ed2a59ad9f6a590080db1549399 |
publicationDate |
2021-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-10957397-B2 |
titleOfInvention |
Non-volatile memory device, storage device, and programming method thereof for performing an erase detect operation |
abstract |
An operating method of a non-volatile memory device including a plurality of memory cells respectively connected to a plurality of word lines is provided. The operating method includes applying an erase detect voltage to a selected word line of the plurality of word lines to perform an erase detect operation on memory cells connected to the selected word line in response to a program command, applying a program voltage to the selected word line after the erase detect operation, and counting a number of undererased cells of the memory cells on which the erase detect operation has been performed. |
priorityDate |
2017-10-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |