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filingDate 2019-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b726ed87ef0fc60338b3547302367fe
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publicationDate 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-10903116-B2
titleOfInvention Void-free metallic interconnect structures with self-formed diffusion barrier layers
abstract Methods are provided for fabricating void-free metallic interconnect structures with self-formed diffusion barrier layers. A seed layer is deposited to line an etched opening in a dielectric layer. A metallic capping layer is selectively deposited on upper portions and upper sidewall surfaces of the seed layer which define an aperture into the etched opening. An electroplating process is performed to plate metallic material on exposed surfaces of the seed layer within the etched opening, which are not covered by the capping layer to form a metallic interconnect. The capping layer prohibits plating of metallic material on the capping layer and closing the aperture before the electroplating process is complete. A thermal anneal process is performed to cause the metallic material of the metallic capping layer to diffuse though the metallic interconnect and create a self-formed diffusion barrier layer between the metallic interconnect and the surfaces of the etched opening.
priorityDate 2018-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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