http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10903110-B2
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b2d32a1324eb3a240649ffee8d475d63 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76808 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
filingDate | 2019-01-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3ae8faf2eb585a51653469b1518cb1b5 |
publicationDate | 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | US-10903110-B2 |
titleOfInvention | Method of forming fine interconnection for a semiconductor device |
abstract | A method of forming fine interconnection includes: forming spacers on a first and second hard mask layer on a dielectric layer; forming a first via hole through the first hard mask layer, the second hard mask layer, and the dielectric layer; oxidizing a sidewall of the first hard mask layer that surrounding the via hole; forming a second via hole in the second hard mask layer; forming a mask to cover the first hard mask layer in the second via hole; forming a line trench in a portion of the second hard mask layer exposed by the spacers and the mask, and in the first hard mask layer and the dielectric layer that are below the portion of the second hard mask layer; and forming a conductive material in the line trench and the first via hole. |
priorityDate | 2018-12-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.