http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10901034-B2

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filingDate 2020-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fd89c3f91093f85a8b1520c265a96f56
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publicationDate 2021-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-10901034-B2
titleOfInvention TSVS, test circuits, scan cells, comparators, electrical source, and resistor
abstract This disclosure describes a novel method and apparatus for testing TSVs within a semiconductor device. According to embodiments illustrated and described in the disclosure, a TSV may be tested by stimulating and measuring a response from a first end of a TSV while the second end of the TSV held at ground potential. Multiple TSVs within the semiconductor device may be tested in parallel to reduce the TSV testing time according to the disclosure.
priorityDate 2012-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 26.